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Title: High-efficiency, wideband RF power amplifiers for cellular infrastructure
Author: Wilson, Richard
ISNI:       0000 0005 0286 0335
Awarding Body: Cardiff University
Current Institution: Cardiff University
Date of Award: 2020
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Over the past decade, the exponential increase in demand for data content has led to many challenges for the cellular networks. More spectrally efficient modulation formats place tight linearity requirements on the system, and the high peak to average ratio of the signals requires the use of power amplifier architectures with high efficiency at backed-off power levels. Also, the push toward multi-band radios demands the use of wideband power amplifiers in the place of multiple single band amplifiers. This work focuses on the following areas of research:- RF Bandwidth Much research focuses on achieving wideband solutions at low frequency (sub 1GHz) or low power (<20W) through the absorption of device parasitics into the matching structures. This work focuses on Doherty amplifier topologies with bandwidths (up to 40% fractional) and power levels (over 100 watts) appropriate for cellular infrastructure applications. The bandwidth of each element in the Doherty amplifier is analyzed across frequency when load modulated. Several novel wideband Doherty amplifier topologies are presented, and two demonstration amplifiers are designed, achieving the state of the art performance. Linearity In recent years, there has been considerable research focus to enhance the linearity of the RF power amplifier when linearized in a digital pre-distortion (DPD) system. Much of this research focuses on the output baseband impedance of the device and circuit. However, until very recently, little work focused on the impact of the device input. This research focuses on the effects of the input baseband impedance of the device and circuit, with a novel input matching topology Abstract III proposed to enable virtually ideal impedance characteristics. A novel integrated passive device is developed to enable the proposed topology, and the enhanced DPD correction, when compared to the current state of the art, is demonstrated using a 60-watt LDMOS device. Performance Scaling with Power and Frequency This research focuses on the minimization of performance impact due to device power scaling at high frequency. A proposed waveform engineering analysis and optimization method using 3D electromagnetic simulation with load-pull is proposed. In addition, a novel matching topology using multi-level, high Q integrated passive devices (IPD) is proposed. The analysis method is used to demonstrate a reduced performance degradation through enhanced voltage and current waveform uniformity across the power transistor. For the first time, the concept of active harmonic impedances due to the distributed effects of a high power RF device is presented.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available