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Title: A novel "in-situ" processed gate region on GaN MOS capacitors
Author: Hemakumara, Dilini Tania
ISNI:       0000 0004 7963 0231
Awarding Body: University of Glasgow
Current Institution: University of Glasgow
Date of Award: 2019
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This work reports a route to the realisation of GaN metal oxide semiconductor capacitors (MOSCAPs) where the GaN surface has not been exposed to atmosphere. This has been achieved by the deposition of a 5nm SiNx "capping" layer as the final part of the GaN on Si MOSCAP wafer growth to encapsulate the GaN surface, followed by its removal in a "cluster" plasma processing tool, which enables both etching of samples and subsequent dielectric and metal deposition without atmospheric exposure between process steps. Capacitance-voltage hysteresis, A Hysteresis, of 90mV and frequency dispersion, A dispersion, of 150mV were achieved from samples where the SiNx capping layer was etched and then transferred under vacuum prior to atomic layer deposition (ALD) of a 20 nm Al2O3 gate dielectric. These were lower than the previously reported values of 250mV and 350mV respectively for GaN-Al2O3 MOS capacitors where the GaN surface had been exposed to atmosphere. The effects of N2 and H2 plasma treatments after SiNx etch and prior to Al2O3 deposition were examined. Exposure to a 150W N2 plasma for 5 minutes produced a Hysteresis and a Dispersion of 200mV and 250mV respectively, both of which reduced to 60mVafter forming gas annealing (FGA) in 10% H2/90% N2 for 30 minutes at 430oC. The insertion of an ALD grown AlN interlayer between an air exposed GaN surface and the Al2O3 gate dielectric resulted in 50mV a Hysteresis and a Dispersion. However, when the process was transferred to samples that went through the SiNx etch and optimised N2 plasma pretreatment, both a Hysteresis and a Dispersion increased to 500mV. The effect of ALD deposition of a TiN gate metal after Al2O3 gate dielectric was also examined. SiNx capped samples were first etched in the cluster tool before transfer to the ALD chamber in which a 20nm Al2O3 gate dielectric was deposited. This was followed by atomic layer deposition of 20nm TiN gate metal. a Hysteresis and a Dispersion of 550mV and 400mV respectively were obtained. These samples had a capacitance-voltage slope which was 155% higher than otherwise comparable structures with Pt/Au gate metal. In conclusion the reductions in a Hysteresis and a Dispersion achieved in this work during in-situ etching and ALD are encouraging for the realisation of high power GaN devices.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
Keywords: TK Electrical engineering. Electronics Nuclear engineering