Use this URL to cite or link to this record in EThOS: https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.773095
Title: Design, fabrication and characterisation of a novel memory device based on III-V semiconductors
Author: Tizno, Ofogh
ISNI:       0000 0004 7960 5124
Awarding Body: Lancaster University
Current Institution: Lancaster University
Date of Award: 2018
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Abstract:
This work is a report on the design, fabrication and room-temperature testing of a novel memory device based on III-V compound semiconductor heterostructures. Using the interfacial misfit (IMF) array growth mode, III-V binary (InAs, AlSb, GaSb) and ternary (AlGaSb, AlGaAs) materials were grown on a lattice mismatched GaAs substrate by molecular beam epitaxy (MBE) under optimised growth conditions. Like Flash, the device is a floating-gate memory, with a junctionless channel to allow non-destructive read of the stored charge. However, there are no oxide layers. Instead, InAs/AlSb quantum wells and barriers provide profound electron confinement in the InAs floating gate. Modelling was undertaken to mathematically calculate the room temperature band diagram of the structure at equilibrium and under bias conditions, along with the electron/hole densities and electron energy levels and wave functions. Three sets of devices with slightly different semiconductor layers were designed and successfully fabricated by employing a top-down processing approach. Room temperature electrical measurements showed reliable memory characteristics with promising durability following thousands of non-destructive read operations and hundreds of erase-read-write-read cycles between "0" and "1" memory states. Non-volatile data retention of at least 104 s in combination with switching at ≤ 2.6V was achieved by use of the extraordinary 2.1eV conduction band offsets of InAs/AlSb and a triple-barrier resonant-tunnelling structure, with excellent prospects for high-speed operation and high endurance. The combination of low-voltage operation and small capacitance suggests a switching energy per unit area 100 and 1000 times smaller than dynamic random access memory (DRAM) and Flash, respectively. These findings hint at the potential of this memory device to be considered as a candidate universal memory.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.773095  DOI:
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