Use this URL to cite or link to this record in EThOS: https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.762856
Title: Real time image processing on FPGAs
Author: Zhang, Shaonan
ISNI:       0000 0004 7659 1791
Awarding Body: University of Liverpool
Current Institution: University of Liverpool
Date of Award: 2018
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Abstract:
In recent years, due to improvements in semiconductor technology, FPGA devices and embedded systems have both been gaining popularity in numerous areas, from vehicle-mounted systems to the latest iPhones. Recently, as Intel (Altera) and Xilinx both released their new generations of ARM A9 processor integrated FPGAs, they have become very popular platforms which combine the hardware features of an FPGA and an embedded systems software's flexibility. This makes it suitable platforms to apply complex algorithms for real time processing of video images. Feature tracking is a popular topic in image processing and usually includes one or more pre-processing methods such as corner detection, colour segmentation, etc. that could be undertaken on the FPGA with little latency. After the pre-processing, complex post-processing algorithms running on the ARM processors, that use the results from the pre-processing, can be implemented in the embedded systems. The research described in this thesis investigated the use of low cost FPGASoC devices for real time image processing by developing a real-time image processing system with several methods for implementing the pre-processing algorithms within the FPGA. The thesis also provides the details of an embedded Linux based FPGASoC design and introduces the OpenCV library and demonstrates the use of OpenCV co-processing with the FPGA. The tested system used a low cost FPGASoC board, the DE1-SOC, which is manufactured by Terasic Inc. As a platform which contains a Cyclone V FPGA designed by Intel with a dual-core ARM A9 processor, the application developed is based on a customized OpenCV programme running on the ARM processors and concurrently receives the pre-processing result processed by the FPGA. With the FPGA acceleration, the developed system outperforms a software-only system by reducing the total processing time by 48.2%, 49.5% and 56.1% at resolutions of 640x480, 800x600 and 1024x768 separately. This reduction in processing time allows an improvement in the performance of systems using the results from the real-time image processing system.
Supervisor: Smith, Jeremy Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.762856  DOI:
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