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Title: TFTs circuit simulation models and analogue building block designs
Author: Cheng, Xiang
ISNI:       0000 0004 7226 8698
Awarding Body: University of Cambridge
Current Institution: University of Cambridge
Date of Award: 2018
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Building functional thin-film-transistor (TFT) circuits is crucial for applications such as wearable, implantable and transparent electronics. Therefore, developing a compact model of an emerging semiconductor material for accurate circuit simulation is the most fundamental requirement for circuit design. Further, unique analogue building blocks are needed due to the specific properties and non-idealities of TFTs. This dissertation reviews the major developments in thin-film transistor (TFT) modelling for the computer-aided design (CAD) and simulation of circuits and systems. Following the progress in recent years on oxide TFTs, we have successfully developed a Verilog-AMS model called the CAMCAS model, which supports computer-aided circuit simulation of oxide-TFTs, with the potential to be extended to other types of TFT technology families. For analogue applications, an accurate small signal model for thin film transistors (TFTs) is presented taking into account non-idealities such as contact resistance, parasitic capacitance, and threshold voltage shift to exhibit higher accuracy in comparison with the adapted CMOS model. The model is used to extract the zeros and poles of the frequency response in analogue circuits. In particular, we consider the importance of device-circuit interactions (DCI) when designing thin film transistor circuits and systems and subsequently examine temperature- and process-induced variations and propose a way to evaluate the maximum achievable intrinsic performance of the TFT. This is aimed at determining when DCI becomes crucial for a specific application. Compensation methods are reviewed to show examples of how DCI is considered in the design of AMOLED displays. Based on these design considerations, analogue building blocks including voltage and current references and differential amplifier stages have been designed to expand the analogue library specifically for TFT circuit design. The $V_T$ shift problem has been compensated based on unique circuit structures. For a future generation of application, where ultra low power consumption is a critical requirement, we investigate the TFT’s subthreshold operation through examining several figures of merit including intrinsic gain ($A_i$), transconductance efficiency ($g_m/I_{DS}$) and cut-off frequency ($f_T$). Here, we consider design sensitivity for biasing circuitry and the impact of device variations on low power circuit behaviour.
Supervisor: Nathan, Arokia Sponsor: Cambridge Commonwealth ; European & International Trust ; Chinese Scholarship Council
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
Keywords: Thin film transistor ; analogue circuit ; Transistor modelling