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Title: Passively aligned packaging solutions for silicon photonics
Author: Reynolds, Scott
ISNI:       0000 0004 7224 8566
Awarding Body: University of Southampton
Current Institution: University of Southampton
Date of Award: 2016
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Packaging is a critical component in bringing silicon photonics to application. Without low cost, high throughput packaging, the per‐unit cost of silicon photonic integrated circuits will be too high for mass markets. Passive alignment of optical fibres to silicon photonic waveguides would significantly reduce the assembly time currently required where active alignment is labour intensive and time consuming. In this work a design is presented that has the potential for high volume cost effective packaging. The design accomplishes this by supporting and positioning multiple fibres relative to a silicon photonic integrated circuit. The capping chip passively aligns the fibres to silicon nanowires via a grating couplers. V‐groove structures in the capping chip are used to support and position the fibres and the end facet of the v‐groove reflects the light down on to the grating coupler. Plugs on the capping chip align with holes on the photonic chip assuring accurate positioning and optimal coupling. The processing required has been detailed and demonstrated, including a hybrid lithography process, crystallographically aligned v‐grooves and highly accurate alignment structures. Once combined these processes will passively align fibre optic cables with silicon photonic waveguide gratings with a misalignment less than 2μm which in theory will produce an added loss less than 1dB, grating couplers have been produced based on a bespoke design fitting the demands of the packaging solution and show a loss of 2.7dB with room for improvement compared to a simulated result of 1.67dB.
Supervisor: Reed, Graham Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available