As the communications revolution continues there is an ever increasing demand for integrated transmitters and receivers on silicon in devices such as mobile phones and networking products. The demand to integrate complete systems onto a single die has driven a need to minimise the area of transmitters which has led to research into combining digital to analogue converters and RF mixers to minimise their area. The drive for increasing speeds and smaller transistors has resulted in higher capacitance densities and lower operating voltages, the latter making it more difficult to implement conventional transmitter circuits. Therefore there is a need for passive transmitter systems that maximise the output power to the load by minimising the voltage overhead on the output signal. This thesis proposes and demonstrates that it is possible to use a digital to analogue converter that performs RF up conversion using direct capacitive discharge to the load, which takes advantage of the large capacitance densities of a modern 40nm CMOS process. The DAC uses charge sharing in a similar manner to a charge sharing DAC without the bandwidth limitations imposed by an output amplifier. The RF frequency up conversion at the DAC data clock rate is produced using two DACs that differentially output the complement of each other on different halves of the clock cycle (one outputting while the other is charging) thereby emulating a passive switched mixer. The thesis shows that an 8 bit capacitive discharge DAC of 0.16mm2 can output 3dBm into a 50Ω load at 2.15GHz using a clock rate of 2GHz with MTPR of greater than 30dBc.