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Title: Circuits and systems for DNA detection by ion-sensitive field effect transistor
Author: Sohbati, Mohammadreza
ISNI:       0000 0004 5361 3652
Awarding Body: Imperial College London
Current Institution: Imperial College London
Date of Award: 2015
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This thesis, after a review on the state-of-the-art sequencing and genotyping technologies, focuses on the semiconductor-based systems using pH change for DNA (Deoxyribonucleic acid) detection by ion-sensitive feld effect transistors (ISFETs). Accuracy and throughput, besides cost, are the key concerns in these systems, which are reflected on their signal-to-noise ratio and ability to process enormous measurement data at low levels for base-calling. Simulations are provided on the signal behaviour, supported by the literature review. The ISFETs have been investigated for their dimension and shape (single-plate vs mesh, and square vs octagonal). More complete formula and design methodology (to suppress the process variations and signal drift) have been provided for the ISFET operation by including the coupling effect. The experiment results, on 8 dies each containing 15 devices, showed the decoupling parasitics dependency on the sensing area perimeter. A buffer-shield structure has been proposed to improve the ISFET coupling. In addition, based on the ISFET drift analysis, measuring the biasing reference electrode current is recommended for the drift direction monitoring/prediction. Considering the two main applications of sequencing and genotyping, new readout configurations have been proposed to enhance the on-chip signal processing. Piecewise linear approximating (PLA), and temperature-insensitive continuous-time ΔpH to digital converter (TICTC), tackle the ISFET and temperature dependency. The TICTC has been designed for a resolution of 0.015pH, easily scalable and only dependent on the relative aspect ratio of its current mirrors. Its dynamic range is not limited despite operating in weak inversion. For very large-scale sequencing arrays, common-mode noise elimination using the back-gate has been proposed. It allows on-chip suppression of the background noise in the sequencing microchips, reducing the low-level processing load. Moreover, a pseudo-inverter-based readout has been designed that may allow improving the conversion resolution by current-mode comparison and indirect feedback to the ISFET gate.
Supervisor: Toumazou, Christofer Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral