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Title: Stage scheduling for CPU-intensive servers
Author: Gordon, M.
Awarding Body: University of Cambridge
Current Institution: University of Cambridge
Date of Award: 2010
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The increasing prevalence of multicore, multiprocessor commodity hardware calls for server software architectures that are cycle-efficient on individual cores and can maximise concurrency across an entire machine. In order to achieve both ends this dissertation advocates stage architectures that put software concurrency foremost and aggressive CPU scheduling that exploits the common structure and runtime behaviour of CPU-intensive servers. For these servers user-level scheduling policies that multiplex one kernel thread per physical core can outperform those that utilise pools of worker threads per stage on CPU-intensive workloads. Boosting the hardware efficiency of severs in userspace means a single machine can handle more users without tuning, operating system modifications, or better hardware.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available