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Title: Analysis and implementation of MFIR filters in FPGA technology
Author: Vandenbussche, Jean-Jacques
Awarding Body: University of Kent
Current Institution: University of Kent
Date of Award: 2012
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This research investigates a digital filter architecture called Multiplicative Finite Impulse Response (MFIR) filters, for implementation on Field Programmable Gate Array (FPGA) technology, MFIR filters are a class of filter structures that can be used to replace recursive Infinite Impulse Response (IIR) filters with Finite Impulse Response (FIR) equivalents, requiring significantly less hardware than classical FIR architectures that fulfil the same specifications. A theoretical analysis of the performance, coefficient quantization effects and round off error behaviour is presented. Optimal FPGA-based implementations are suggested and analyzed. The performance of the MFIR structures is checked based on real-life applications. MFIR structures cannot compete with the IIR structures in terms of hardware requirements. Therefore, the MFIR approximation is mainly appropriate when potentially unstable IIR filters (with poles close to the unit circle) must be implemented in hardware or when linear phase filters with narrow transition bands are required . In general, it can be concluded that MFIR structures, when implemented on FPGA technology, are very good structures for the realization of demanding, possibly linear phase, stable digital filters.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available