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Title: Dielectics on germanium : electrical and interfacial properties
Author: Tantraviwat, Doldet
ISNI:       0000 0004 2722 7766
Awarding Body: Queen's University Belfast
Current Institution: Queen's University Belfast
Date of Award: 2011
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Over the past decades, the continuous reduction in Si02/Si device dimensions has been approaching its technological and fundamental limits. This opens a possibility of novel channel materials and high-x dielectrics to be implemented for future CMOS field-effect transistors (FETs). Germanium has recently gained a lot of research interest due to its high electron and hole mobilities. Therefore, Si02, Ah03, and Hf02 materials are investigated as potential gate dielectrics for future germanium MOSFETs. Atmospheric pressure chemical vapour deposition technique is used to deposit Si02 on germanium, showing good results. The influence of an aluminium gate is experimentally demonstrated and the device performance of Si02/Ge devices is degraded during thermal treatment. The use of tungsten allows Si02/Ge capacitors to receive higher thermal treatment. Minority carrier lifetime is studied through low temperature capacitance-time measurements. Zerbst plots and linear approximation equation are used to determine carrier generation lifetime. Atomic layer deposition of Ah03 and Hf02 materials are also studied. Direct formation of Ah03 on germanium provides reasonable results. However, degradation of device performance is observed after thermal treatment, implying that a good interface layer is needed. In-situ plasma nitridation and thermal oxidation processes are developed to form GeOxNy and Ge02 interface layers, respectively. A high quality interface between germanium and Ge02 is observed, resulting in good electrical properties of capacitors with a Ge02 interface layer. Germanium MOSFETs are fabricated with Si02, Hf02 and Ah03 gate dielectrics with and without an interface layer. High electron (~1400 cm2N's) and hole mobilities (~540 cm2N•s) are experimentally demonstrated on devices with Si02 gate dielectric. However, low hole mobilities are observed on high-x/Ge transistors with and without GeOxNy interface layer, ~80-100 and ~160 cm2N•s, respectively. Consistent with the results observed on MOS capacitors, it is believed that high interface trap density is responsible for degradation of transistor performance.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available