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Title: Reconfigurable architecture floorplan optimisation using analytical techniques
Author: Kahoul, Asma
ISNI:       0000 0004 2715 3912
Awarding Body: Imperial College London
Current Institution: Imperial College London
Date of Award: 2012
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Since the invention of FPGAs in 1984, their capabilities have increased dramatically making them more speed, area, and power efficient than older reconfigurable devices. These advances were made possible by better computer aided design tools and the continuous development of algorithms used to both design the chips, and to map circuits onto them. However, current methodologies for FPGA chip design suffer from their dependence on empirical approaches which sample the design space based on intuition and heuristic techniques. As a result these empirical tools might result in good architectures but their optimality cannot be measured. This thesis argues the case for the use of analytical models in heterogeneous FPGA architecture exploration. It shows that the problem, when simplified, is amenable to formal optimisation techniques such as Integer Linear Programming (ILP). However, the simplification process may lead to inaccurate models causing uncertainty about the quality of the results. Consequently, existing accurate models such as that used in the versatile place and route (VPR) tool are used to quantify the performance of the analytical framework in comparison with traditional design methodologies. The results obtained in this thesis show that the architectures found by the ILP model are better than those found using traditional parameter sweep techniques with an average improvement of up to 15% in speed. In addition, these architectures are further improved by combining the accuracy of VPR with the efficiency of analytical techniques. This was achieved using a closed loop framework which iteratively refines the analytical model using place and route information from VPR. The results show a further average improvement of 10% and a total improvement of 25% in comparison with a parameter sweep methodology. In summary, the work carried out in this thesis shows that the ILP architecture exploration framework may not model heterogeneous architectures as accurately as current place and route tools, however, it improves on parameter sweep techniques by exploring a wider range of designs.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available