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Title: Pentacene based organic electronic devices
Author: Yun, Youngjun
ISNI:       0000 0004 2694 3445
Awarding Body: Durham University
Current Institution: Durham University
Date of Award: 2010
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This thesis describes a study of pentacene-based organic electronic devices with poly(methyl methacrylate) (PMMA) and cross-linked PMMA (cPMMA) gate dielectrics. The electrical characteristics of pentacene-based organic thin-film transistors (OTFTs) using PMMA as the gate dielectric are reported. Uniform pinhole-free and crack-free films of PMMA could be obtained by spin-coating, with a lower limit to the thickness of about 150 nm. The effects of the insulator thickness and channel dimensions on the performance of the devices has been investigated. Leakage currents, which are present in many devices using polymeric gate dielectrics, were reduced by patterning the pentacene active layer. The resulting transistors exhibited minimal hysteresis in their output and transfer characteristics with an acceptable performance (a field-effect mobility of 0.33 cm2 V−1 s−1, a threshold voltage of -11 V, an on/off current ratio of 1.2X106 and a subthreshold slope of 1.5 V per decade). A bootstrapped inverter incorporating optimised pentacene OTFT structures, with PMMA as the gate dielectric, has been designed, fabricated and tested. The inverter uses capacitive coupling and bootstrapping effects, and exhibits superior performance to the normal diode-connected load inverter. The circuit has a 30 us rise time and 450 us fall time, at an operating frequency of 1 kHz and 30 V drive voltage. Pentacene-based OTFTs incorporating a PMMA gate insulator usually possess a large operating voltage, related to the thickness of the PMMA layer. A physical method, in particular ion-beam irradiation, to produce ultra-thin cross-linked layers of PMMA (33 nm) is introduced. It is demonstrated that physical cross-linking of the PMMA gate dielectric can be used to produce OTFTs with improved performance (a field-effect mobility of 1.1 cm2 V−1 s−1, a threshold voltage of -1 V, an on/off current ratio of 1.0X106 and a subthreshold slope of 220 mV per decade) and operating at low voltages, < 10 V. Low voltage memory transistors based on various charge storage elements (gold nanoparticles, ultra-thin aluminium and silver films) with cPMMA as the gate dielectric, have been investigated. Solution-processed OTFTs based on 6,13-bis(triisopropylsilylethynyl) (TIPS) pentacene with PMMA and cPMMA as the gate dielectric were also studied.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available