The fast progress in biological study has attracted a growing interest in mimicking the signal processing functions of biological neural systems, which can be implemented in hardware and used to inspire new techniques for real time computations. On the other hand, the ITRS roadmap for Si indicates that alternative paradigms for building computational machines will be required within about 10 years and the massive parallelism of neural systems represents an attractive option. However most implementation approaches are restrictive in physical dimensions and characteristics towards biological networks in hardware. Thus there is a pressing need for compact. low power neural building blocks with operational characteristics that closely mimic realistic neuron cells. In this thesis, a charge coupled synapse is developed as a core building block for spiking neural networks in hardware. The proposed silicon synapse is based on a two-phase charge transfer device with associated localized memory capability. The correspondence between the fundamental semiconductor processes and the required biological functionality is illustrated by theory.