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Title: Exploiting object structure in hardware transactional memory
Author: Khan, Behram
ISNI:       0000 0004 2668 6522
Current Institution: University of Manchester
Date of Award: 2009
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Fundamental limits in integrated circuit technology are bringing about the acceptance that multi-core and, in the future, many-core processors will be commonplace. If general purpose applications are required to exhibit high performance on such processors, it will be necessary to develop new, easy to use, parallel programming techniques. Traditionally, concurrent programming has employed locks to safeguard concurrent access to shared data, but these are known to be challenging to use, and only a minority of developers have the expertise to write robust, let alone highly scalable, lock-based code. Transactional Memory (TM) is a new concurrent programming model that is receiving attention as a way of expressing parallelism for programming multi-core systems. As a parallel programming model it is able to avoid the complexity of conventional locking, while attempting to deliver similar or better performance. The ACI (atomicity, consistency, isolation) properties of transactions provide a foundation to ensure that concurrent reads and writes of shared data do not produce inconsistent or incorrect results.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available