Use this URL to cite or link to this record in EThOS:
Title: Recursive and concurrent VLSI architectures for digital signal processing.
Author: Yung, H. C.
ISNI:       0000 0001 3576 2759
Awarding Body: University of Newcastle upon Tyne
Current Institution: University of Newcastle upon Tyne
Date of Award: 1985
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No abstract available
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available
Keywords: Information theory & coding theory