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Title: Boron activation and diffusion in pre-amorphised silicon and silicon-on-insulator
Author: Hamilton, Justin J.
ISNI:       0000 0001 3528 4531
Awarding Body: University of Surrey
Current Institution: University of Surrey
Date of Award: 2007
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For the next generation of electronic products, transistors need to be reduced in size and are required to be highly activated with ultra shallow source/drain extension regions. For p-type dopant implants, a promising fabrication approach is the use of pre-amorphising implants (PAIs). This reduces boron channelling and increases electrical activation due to solid-phase epitaxial re-growth. For technology nodes of 45 nm and beyond, silicon-on-insulator (SOI) is seen as the substrate of choice. Therefore the behaviour of dopants in these substrates needs to be studied to assess whether their electrical and diffusive properties differ from those observed in bulk silicon (Si). Besides forming an amorphous layer, PAIs generate an interstitial-rich region just below the former amorphous/crystalline interface, which on annealing develop into so-called 'end of range' (EOR) defects. These evolve during prolonged annealing, releasing interstitial Si atoms that interact with the boron implant. This causes undesired effects, such as transient enhanced diffusion (TED) and boron-interstitial cluster (BIC) formation, the latter manifested as electrical deactivation. The main aims of this work are to investigate the silicon/buried oxide interface in SOI as a sink for Si interstitials and then to tailor the implant conditions to reduce BICs and TED. The research used a series of processing conditions and analytical techniques to study the electrical and structural properties of the samples, with support from Monte Carlo simulations. The results show that optimised PAI (32 keV 1x10 15 Ge cm-2) in SOI can produce junctions with little de-activation and reduced TED. Optimised PAI in SOI with a 500 eV 2x10 15 B cm-2 implant led to an reduction in deactivation by a factor of six, from 480 omega/ in bulk Si to 80 omega/ in SOI. This produced stable sheet resistance values ~800 Omega/ over a range of anneal temperatures (700-1000 C). At peak electrical B deactivation (850 C), junction depth in SOI was reduced by a factor of 1. 5x from 42. 5 nm in bulk Si to 27. 5 nm in SOI at a B concentration of 1x10 18 cm-3. The mechanisms responsible for these improvements in SOI are (1) the buried oxide interface acting as an efficient interstitial sink, with a near zero value for recombination length. (2) The as-implanted excess interstitial population being reduced by trapping in the buried oxide. The methods described in this thesis are fully compatible with current industrial processes without the need for additional new equipment or process steps at extra costs, making it an attractive alternative and complement to current techniques.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available