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Title: Investigation into energy-efficient co-synthesis of distributed embedded systems
Author: Wu, Dong
ISNI:       0000 0001 3573 2808
Awarding Body: University of Southampton
Current Institution: University of Southampton
Date of Award: 2004
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Energy dissipation is an important performance parameter for portable embedded systems. This thesis focuses on minimising power consumption (dynamic and leakage) at the system level of the design flow. Special emphasis is placed upon developing cosynthesis techniques (mapping, scheduling, and energy management) for systems that contain processing elements which can trade off between performance and power consumption during run-time by employing dynamic voltage scaling (DVS) and adaptive body biasing (ABB). The first part of the thesis addresses dynamic power minimisation for data and control dominated embedded systems. A novel conditional behaviour-aware DVS (CBADVS) targeting embedded systems expressed as conditional task graphs has been proposed. The CBADVS exploits the slack time taking into account the conditional behaviour of the application, so that energy dissipation is reduced and, at the same time, timing feasibility is guaranteed for all possible condition values. Furthermore, a genetic algorithm based mapping is introduced to optimise the system implementation towards effective exploitation of the proposed CBADVS, hence, leading to further energy reduction. The technique has been validated extensively including a real-life example of vehicle cruise controller, and it has been shown that up to 42% energy saving is achieved with 5 seconds computational time, and with no penalty in meeting real-time constraints. The second part of the thesis addresses the impact of communications on dynamic power minimisation in data and control dominated systems design. It is shown how the concept of enhanced system model, which captures the time and power costs of communications, allows the design of energy-efficient embedded systems by integrating communications with the above CBADVS based co-synthesis technique. The computational time of the communication-integrated co-synthesis technique has been reduced by analysing the deficiency of concurrent task and communication mapping, and decoupling communication from task mapping. A large number of experiments have been used to investigate the effect of alternative communication architectures on system quality in terms of energy efficiency. The co-synthesis techniques of the first and second parts have focused on dynamic power reduction. The final part of the thesis presents a power-composition profile aware co-synthesis technique to reduce dynamic power as well as leakage power. In particular, the proposed technique performs a power management selection at the architectural level, with the aim of achieving high energy saving at a reduced implementation cost. Furthermore, the proposed technique performs mapping, scheduling and voltage scaling (DVS and/or ABB) for applications specified as task graphs with timing constraints. The technique has been validated using extensive experiments including a real-life GSM voice CODEC example.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available