In analogue circuit designs, an initial circuit topology is usually chosen with a set of parameters from the designer's experience. A sequence of simulation and redesign then follows to produce a circuit with acceptable performance. This procedure is tedious, repetitive and time consuming. There have been some attempts to synthesise analogue circuits automatically. Most of these systems take a manual pre-programmed approach, whereby the designers need to transfer their knowledge into a database and the database needs to be updated with sophisticated rules or whenever new design techniques/procedures are developed. It is the aim of the work described in this thesis to formulate a synthesis technique that does not depend on pre-defined rules and allows changes in technology and library cells to be adopted easily. An algorithm to synthesise analogue circuits from over-designed circuits is described in this thesis. The technique to select circuit topologies from over-designed circuits and to fine-tune the selected circuit is based on the Simulated Annealing algorithm. The "Hill-climbing" ability of the Simulated Annealing algorithm allows it to search for the global minimum rather than settling to a local minimum.