Use this URL to cite or link to this record in EThOS:
Title: Petri nets approach to test generation and analysis of hierarchically described digital circuits.
Author: Kadim, H. J.
ISNI:       0000 0001 3593 7918
Awarding Body: University of Hull
Current Institution: University of Hull
Date of Award: 1993
Availability of Full Text:
Access from EThOS:
No abstract available
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available
Keywords: VLSI systems