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Title: Charge trapping instabilities in amorphous silicon/silicon nitride thin film transistors
Author: Hepburn, Anthony R.
ISNI:       0000 0001 3553 8837
Awarding Body: Dundee College of Technology
Current Institution: Abertay University
Date of Award: 1988
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Charge trapping phenomena within amorphous silicon-silicon nitride TFTs have been characterised in an extensive study. A new experimental technique has been developed and applied in conjunction with the standard measurement of threshold voltage. The new technique reveals two electron trapping centres which exist within the a-Si:H layer, one about 0.45eV the other about 0.85eV from the conduction band edge. The amount of charge located within both states increases as the device is stressed. The annealing out of the charge trapping phenomenon is found to be thermally activated although, in some circumstances, reverse bias annealing is also found to be effective. The results are interpreted in terms of a model in which the charge trapping instabilities are due to two separate phenomena. Charge trapping into the insulating layer is found to occur. However, a new mechanism identifed conclusively and for the first time by this study is that of single carrier creation of metastable silicon dangling bonds close to the interface. The neutralisation of charge in these states has been investigated and is found to occur through a simple thermal release process for trapped charge within the silicon layer and by a mechanism akin to xerographic depletion discharge, when charge becomes trapped in the insulating layer. Additionally, a Meyer-Neldel relationship is found to exist between the release activation energy and attempt-to-escape pre-factor of the various localised states. Such an observation is new and no explanation is forthcoming. However, it is noted that similar experiments conducted by other groups reveal consistent data.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available
Keywords: Semiconductor charge trapping