Use this URL to cite or link to this record in EThOS:
Title: Instruction scheduling for a family of multiple instruction issue architectures.
Author: Wang, Liang.
ISNI:       0000 0001 3560 5948
Awarding Body: University of Herfordshire
Current Institution: University of Hertfordshire
Date of Award: 1993
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No abstract available
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available
Keywords: RISC design; Processors