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Title: A novel method of production of CdS/CdTe thin film solar cells
Author: Bhatti, Muhammad Tariq
ISNI:       0000 0001 3463 4069
Awarding Body: University of Northumbria at Newcastle
Current Institution: Northumbria University
Date of Award: 1993
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Thin films of CdTe have been produced using stacked elemental layer (S. E. L. ) processing. This method consists of depositing alternate layers of the elements (Cd and Te in this case) followed by an anneal to react them to form CdTe. The layers were deposited using vacuum evaporation and the deposition conditions optimised so that uniform layers with controllable thicknesses produced. The CdTe was synthesised by annealing in air, vacuum and nitrogen environments and the crystal structure, crystallinity, surface morphology, optical, electrical properties of the layers related to the fabrication conditions. An anneal at 450C for 15 minutes was found to be optimum for fully synthesising the CdTe without degrading the optical properties of the layers. All the layers synthesised had the sphalerite crystal structure. The layers synthesized in nitrogen and vacuum environments consisted of small randomly oriented grains (~1000 A in diameter) whereas the layers synthesized in air consisted of slightly larger grains. X-ray diffraction data for the latter layers however indicated that CdTe03 was present as a second phase material and hence the layers synthesised in nitrogen or vacuum were preferred. It was found that annealing the CdTe layers after dipping them into a solution of CdC12 in methanol recrystallised the CdTe so that the layers now consisted of large columnar grains. This annealing treatment also converted the as synthesized layers from n-type to p-type with net acceptor concentration ~10e15 - 1Oe16 cm3. Solar cells made using the recrystallised layers had efficiencies ~ 2% (Vo.c. ~ 680mV, Js.c. ~ 11mA/cm2 and F.F. ~ 0.35) The solar cells were fully characterised and detailed measurements indicate that the quality of the CdTe and its interface with CdS are good. The efficiency is limited by the series resistance of the device and further work to reduce the contact resistance resistance to the CdTe and the bulk resistances of the CdS and CdTe should improve both Js.c. and the F.F. to improve the device efficiency to > 10%.
Supervisor: Miles, Robert Sponsor: Ministry of Science and Technology, Government of Pakistan
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available
Keywords: H600 Electronic and Electrical Engineering