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Title: Self-organising techniques for tolerating faults in 2-dimensional processor arrays.
Author: Evans, Richard Anthony.
ISNI:       0000 0001 3454 4047
Awarding Body: University of Warwick
Current Institution: University of Warwick
Date of Award: 1988
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No abstract available
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available
Keywords: Integrated circuit design