| Use this URL to cite or link to this record in EThOS: | https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.283229 |
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| Title: | New data synchronization & mapping strategies for PACE - VLSI processor architecture. | ||||
| Author: | Xu, Yifan. |
ISNI:
0000 0001 3573 9604
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| Awarding Body: | University of Nottingham | ||||
| Current Institution: | University of Nottingham | ||||
| Date of Award: | 1995 | ||||
| Availability of Full Text: |
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| Abstract: | |||||
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No abstract available
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| Supervisor: | Not available | Sponsor: | Not available | ||
| Qualification Name: | Thesis (Ph.D.) | Qualification Level: | Doctoral | ||
| EThOS ID: | uk.bl.ethos.283229 | DOI: | Not available | ||
| Keywords: | Parallel processing; Real-time control | ||||
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