Use this URL to cite or link to this record in EThOS: https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.276764
Title: The development of reproducible low dose selenium implantation into SI GaAs for integrated circuit development
Author: Leigh, P. A.
ISNI:       0000 0001 3607 8991
Awarding Body: University of Surrey
Current Institution: University of Surrey
Date of Award: 1982
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Abstract:
The objectives of this work were to study Se implantation into semi-insulating GaAs and achieve reproducible electrical activation with the intention of relating the electrical properties of the implanted layers directly to the requirements of GaAs integrated circuits. The encapsulation of GaAs is essential for high temperature post implant annealing and many problems related to outdiffusion of Ga or As, the redistribution of impurities together with the breakdown of the encapsulant had been reported when this work began in 1977. The implantation results achieved at that time showed a variation in the electrical activation dependent on the type of encapsulant used, the commercial source of the substrates and the species chosen as the implanted impurity. These are reviewed in the literature survey. In this thesis the development of an apparatus for rapid deposition of CVD Si[3]N[4] from mixtures of silane and ammonia is described. The properties of this encapsulant were investigated using a range of physical techniques. Epitaxial n on n[+] GaAs was annealed at high temperatures using the CVD Si[3]N[4] encapsulant to investigate the effects of high temperature annealing on the electrical properties of GaAs. The results of this work established the encapsulant quality to be excellent and suitable for post implant annealing of semi-insulating GaAs. The variations in the quality of semi-insulating substrates were investigated by the electrical measurements of implanted samples and by secondary ion mass on samples implanted with a low dose of Se ions which would be suitable spectrometry analysis. The major part of the implantation studies were for development of integrated circuits. The electrical activation, carrier profile and mobility of a number of samples were determined and the reproducibility of the electrical activation, profile shape and high mobility confirmed. The relationship between the FET dc characteristics and the implanted profile was established both experimentally and by using a computer model.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.276764  DOI: Not available
Keywords: Circuits
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