Use this URL to cite or link to this record in EThOS: https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.254950
Title: Real-time implementation of low bit-rate speech coders for satellite land-mobile communication systems
Author: Asjadi, Hosein G.
ISNI:       0000 0001 3430 799X
Awarding Body: University of Surrey
Current Institution: University of Surrey
Date of Award: 1990
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Abstract:
The fantastic growth in communication systems points to the fact that human beings need to exchange information in order to achieve better social, cultural and technical developments. Voice communication remains the dominant part of nearly all emerging communication networks. The remarkable progress in both the development of digital signal processing techniques and the associated VLSI technology has made analogue telephony redundant. Low bit-rate digital coding of voice has become of paramount importance in accommodating the tremendous increases in the number of users in the presence of constraints of bandwidth and power in such areas as cellular radio or satellite links. In this research, we have been concerned with the real-time implementation of speech coders in the range of 13 to 4.8 kbit/s. When this work started, the world's first floatingpoint processor, AT&T WE-DSP32, had just become commercially available. We may claim that we were amongst the first users of this chip and its enhanced version, DSP32C. During the course of this work, three coders at 13, 9.6 and 4.8 kbit/s were successfully implemented in real-time . The coders were developed for use in three different communication systems covering the fields of maritime (INMARSAT-M), satellite (VSAT), land-mobile (GSM) telephony. It is the aim of this thesis to report on the software and hardware developments of the three coders, together with considerations on their performances. Although, the major emphasis of the thesis is placed on the software and hardware implementation of the three coders, some of the more general aspects of real-time speech coding are put in perspective. The issue of fixed and floating-point implementation together with a review of a selection of DSP chips in both categories are presented. This study concludes that the more rapid progress of floating-point DSPs and their superior programming flexibilities and precision will probably render them the best choice in the future.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.254950  DOI: Not available
Keywords: Digital signal processing
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