This thesis covers process development for the growth of silicon and silicon germanium epitaxial layers in a novel single-wafer LPCVD system. The development work performed included material characterisation, and layers were grown for device applications. The original CVD epitaxy techniques used high growth temperatures and atmospheric or reduced pressures. Although sufficient for the device designs of the day, material for advanced devices required improved epitaxial methods. Improved CVD techniques utilizing reduced growth temperatures and pressures have allowed improved material quality in terms of sharper dopant and alloy transitions. CVD and its variants are now able to produce material suitable for advanced device structures. The SUMC LPCVD technique allows growth of material suitable for use in advanced device designs without the slow throughput and very high cost of UHV techniques such as MBE. The quality of the substrate-epitaxy interface is important both for high quality epitaxy and device performance. If any active device areas are in the region of the interface, the interface must be sufficiently free of contaminants to not adversely affect device performance. Ex-situ cleans which leave the wafer surface oxide terminated are reported to produce higher quality interfaces, which is found to be the case for layers grown by the SUMC technique. Interfacial oxygen levels have been reduced by the use of a modified RCA clean, and interfacial carbon levels have been reduced by modifying both the vacuum pumps and the gas handling procedures. Doped and undoped epitaxial silicon have been produced by the technique, and found to be of excellent crystalline quality. Layers have been grown in the temperature range ≤700°C to 1000°C, with growth rates in the range of ≤200A/minute to ≥0.1pm/minute.