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Title: Accelerating fully homomorphic encryption over the integers
Author: Moore, Ciara Marie
Awarding Body: Queen's University Belfast
Current Institution: Queen's University Belfast
Date of Award: 2015
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Many organisations are moving towards using cloud storage and cloud computation services. This raises the important issue of data security and privacy. Fully homomorphic encryption (FHE) is a privacy-preserving technique which allows computations on encrypted data without the use of a decryption key. FHE schemes have widespread applications. from secure cloud computation to the secure access of medical records for statistical purposes. However. current software implementations of FHE schemes are not practical for real time applications due to slow performance and inherently large parameter sizes required to guarantee an adequate level of security. Therefore, in this thesis, algorithmic and architectural optimisations of FHE hardware designs are proposed to Improve the performance of these schemes, targeting the FPGA platform. The focus is on FHE over the integers. The first reported hardware designs of the encryption step of the integer-based FHE scheme are proposed, incorporating Comba and FFT multiplication methods. These designs achieve speed up factors of up to 13 and 45 respectively compared to the existing benchmark software implementation. A novel design in which a low Hamming weight multiplicand Is incorporated into the multiplication required in the encryption step is also proposed to further enhance performance and a speed up factor of up to 130 is attained. A comprehensive analysis of multiplication techniques for large integers is presented to determine the most optimal hardware building blocks for FHE operations. Hardware designs of novel combinations of multiplication methods are proposed for this purpose. For some applications, these combined multiplier architectures are shown to perform better than architectures using individual multiplication methods. Throughout this research, it is shown that optimised hardware architectures of FHE schemes can greatly improve practicality; significant speed up factors, ranging up to 130, are achieved with the hardware design of the encryption step of the integer-based FHE scheme.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available