Use this URL to cite or link to this record in EThOS: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.694570
Title: Analysis in circuit breaker performance requirements for high-voltage DC networks
Author: Page, Frederick Peter
ISNI:       0000 0004 5992 1584
Awarding Body: University of Strathclyde
Current Institution: University of Strathclyde
Date of Award: 2016
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Abstract:
Power transmission systems are seeing significant changes with the introduction of large amounts of renewable energy. Integration of these into the network is challenging on two fronts. Firstly, increased penetration stresses conventional generation as those from renewable are intermittent and fluctuate in power output. Secondly, many of these sources are located in areas which are difficult or impossible to economically connect to the network using convention ac technology. This is a major issue for offshore wind where distances to shore are increasing, particularly in the North Sea region. Large scale, multi-terminal high voltage dc networks may offer a solution to these issues, and modern voltage source converters have a small enough footprint to be located on offshore platforms. However, during dc faults these suffer from high currents and the system is unable to transfer power. Prototype dc circuit breakers have been developed by manufacturers to, in theory, allow seamless operation of the healthy areas of the network when a fault occurs. In order to do this they operate extremely fast; opening in less than 5ms. To achieve this the topologies have become complex and expensive, hindering development of multi-terminal systems. In this thesis the requirements of the converter, dc breakers and overall HVDC network are reassessed. The factors influencing stress within the converter and breaker are quantified. Design adjustments which may be used to mitigate these are then investigated. Simplified circuit analysis allows approximations the stresses to calculated and used for initial design iterations. The impact these design alterations has on normal operation is then addressed. A multi-terminal system model is then used to assess how different circuit breaker topologies can effect the fault ride-through of the network. Fault detection and discrimination algorithms are implemented to ensure accurate representation of the time overhead this incurs. It is shown that the variation between slower, cheaper circuit breakers and faster, more costly circuit breakers is not as large as indicated in the current literature. Ride-through for slower circuit breakers is achieved for only a marginal increase in restart time, which is still below the operating speed of conventional ac breakers.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.694570  DOI: Not available
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