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Title: Hardware fabrics for cryptographic algorithms
Author: Wojcik , Marcin
ISNI:       0000 0004 5920 9271
Awarding Body: University of Bristol
Current Institution: University of Bristol
Date of Award: 2014
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Protecting confidential information is a far from trivial task. It is at least a two-side problem. First, cryptographic algorithms have to be designed to resist theoretical attacks; second, these algorithms are likely to be implemented and run in untrusted environments. Such environments increase the risk of physical attacks, in which hardware fabrics play an important role. There is no doubting that , in certain scenarios, these underlying fabrics on which secure algorithms are executed are a crucial factor in the security of the system. This thesis focuses on hardware fabrics for cryptographic algorithms, and investigates new directions in the secure execution of said algorithms in embedded systems. The first part of the thesis analyses properties of Physically Unclonable Functions (PUFs) and their applications. We examine one of the FPGA-based PUF designs and identify the flaw that prevents this PUF from being used in security applications. Exploring possible solutions, we successfully apply two of them and mitigate for the encountered issue. This makes the investigated PUF design applicable within the security context. Additionally, we also perform analysis of raw SRAM PUF data from a discrete SRAM memory, and use them to assess the properties of an off-line authentication mechanism. 'vVe propose an extension for said mechanism to mitigate the bias encountered in the raw PUF data. In the second part of this thesis we investigate fabrics for secure and efficient execution of cryptographic algorithms by first, preparing a low-power time multiplexed FPGA model, and second, proposing and studying a range of generic countermeasures against physical attacks. Next, we explore a novel mechanism for dynamic (run-time changeable) cryptographic Instruction Set Extension (ISEs) , showing that this approach mitigates issues associated with static ISEs. Finally, we conclude with a concrete example of a hardware-based onion router which utilises a hybrid fabric for efficient executions of cryptographic workloads.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available