Use this URL to cite or link to this record in EThOS: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.679696
Title: Low-complexity algorithms for automatic detection of sleep stages and events for use in wearable EEG systems
Author: Imtiaz, Syed Anas
ISNI:       0000 0004 5371 949X
Awarding Body: Imperial College London
Current Institution: Imperial College London
Date of Award: 2015
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Abstract:
Objective: Diagnosis of sleep disorders is an expensive procedure that requires performing a sleep study, known as polysomnography (PSG), in a controlled environment. This study monitors the neural, eye and muscle activity of a patient using electroencephalogram (EEG), electrooculogram (EOG) and electromyogram (EMG) signals which are then scored in to different sleep stages. Home PSG is often cited as an alternative of clinical PSG to make it more accessible, however it still requires patients to use a cumbersome system with multiple recording channels that need to be precisely placed. This thesis proposes a wearable sleep staging system using a single channel of EEG. For realisation of such a system, this thesis presents novel features for REM sleep detection from EEG (normally detected using EMG/EOG), a low-complexity automatic sleep staging algorithm using a single EEG channel and its complete integrated circuit implementation. Methods: The difference between Spectral Edge Frequencies (SEF) at 95% and 50% in the 8-16 Hz frequency band is shown to have high discriminatory ability for detecting REM sleep stages. This feature, together with other spectral features from single-channel EEG are used with a set of decision trees controlled by a state machine for classification. The hardware for the complete algorithm is designed using low-power techniques and implemented on chip using 0.18μm process node technology. Results: The use of SEF features from one channel of EEG resulted in 83% of REM sleep epochs being correctly detected. The automatic sleep staging algorithm, based on contextually aware decision trees, resulted in an accuracy of up to 79% on a large dataset. Its hardware implementation, which is also the very first complete circuit level implementation of any sleep staging algorithm, resulted in an accuracy of 98.7% with great potential for use in fully wearable sleep systems.
Supervisor: Rodriguez-Villegas, Esther Sponsor: European Research Council
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.679696  DOI: Not available
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