Use this URL to cite or link to this record in EThOS: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.676487
Title: Development of digital signal processing techniques to provide augmented vision for improving visual sensitivity of visually impaired people
Author: Gibson, Ryan
ISNI:       0000 0004 5372 9321
Awarding Body: Glasgow Caledonian University
Current Institution: Glasgow Caledonian University
Date of Award: 2014
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Abstract:
There is a significant number of visually impaired individuals who suffer sensitivity loss to high-spatial frequencies, for whom current optical devices are limited in degree of visual aid and practical application, Digital image and video processing offers a variety of effective visual enhancement methods that can be utilised to obtain a practical embedded augmented vision device such as a head mounted display device, Common approaches to augmented vision extract an images high-spatial frequencies through digital image processing edge detection techniques, which are then overlaid on top of the original image to improve visual perception amongst the visually impaired, Augmented visual aid devices require highly user-customisable, real-time capable algorithms designed for subjective configuration per task, where current digital image processing visual aids offer very little user-configurable options, Firstly, the effectiveness of various digital image edge detection techniques through augmented image visual experiments with simulated low-vision subjects are investigated, A comparitive study of the 6416 DSP and Virtex-5 FPGA embedded platforms are evaluated for performance benchmarks of implemented edge detectors of various complexity. In addition to optimising the mathematically complex statistical edge detection algorithm for embedded implementation. A highly user-customisable real-time morphology edge enhanced augmented vision algorithm and FPGA realisation are presented, where the edge type, magnitude and edge thickness can be modified during real-time operation. A reconfigurable morphological architecture for real-time implementation on FPGA is developed, which obtains performance comparable to other approaches, in addition to obtaining a significant degree of reconfigurability not previously demonstrated in literature. A morphological abstraction framework is presented, where images are significantly abstracted to obtain efficient visual entropy through enhancing key edge component information, while simultaneously reducing other image information. The morphological abstraction framework is highly suited for FPGA implementation, produces visually comparable results to equivalent methods, while obtaining efficient computational complexity. A morphological edge preserving smoothing filter is presented, which utilises adaptive structuring element functions obtained from a counter-harmonic mean bilateral filter that asymptotically corresponds to morphological operations.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.676487  DOI: Not available
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