Use this URL to cite or link to this record in EThOS: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.662760
Title: Micropipeline controller design and verification with applications in signal processing
Author: Taylor, George
Awarding Body: University of Edinburgh
Current Institution: University of Edinburgh
Date of Award: 1998
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Abstract:
Asynchronous circuits, in comparison with synchronous circuits, have the potential to offer power and speed advantages combined with improved design reuse and composition. Continual improvements in fabrication technology increase die sizes and decrease device sizes, increasing the difficulty of clock distribution and timing validation in synchronous designs. As a consequence there has been a resurgence of interest in asynchronous circuits and design methods. This work examines aspects of asynchronous micropipeline controller design, verification and application. A micropipeline controller circuit is presented and compared with other controller circuits. A method for modelling asynchronous circuits using process algebra at an individual gate level is examined and used to verify the controller circuit. Two applications in the context of the discrete cosine transform (DCT) are then explored. The first application is an area and power efficient circuit for bit serialisation and matrix transposition. This can be used either to embed a synchronous bit-serial processing core into a bit-parallel environment or to perform matrix transposition as part of a DCT. Key elements are modelled using process algebra. The second application is an initial attempt at an asynchronous application specific processor which is used to implement the DCT, and is intended to be extendible to other signal transforms. The presented micropipeline controller was found to be superior to other controllers for linear micropipelines, which are key parts in the applications studied. The modelling method used has been found suitable for the verification of manually designed gate-level circuits. Finally the applications have illustrated that the use of asynchronous methods makes new or simpler architectures possible.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.662760  DOI: Not available
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