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Title: A single-chip CMOS tracking image sensor for a complex target
Author: Matsunaga, Shinichiro
Awarding Body: University of Edinburgh
Current Institution: University of Edinburgh
Date of Award: 2002
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Recently CMOS sensors have been greatly improved, and various smart sensors, which include processing units inside the chip, have been reported. Although a number of methods for motion detection are reported in the literature, little attention has been paid to tracking sensors. Many motion detection sensors have been reported, and sometimes motion detection and motion object tracking are regarded as equivalent, since they typically use the same algorithm at the front end. However they are not the same. Tracking means tracing the progress of objects as they move about in a visual scene. The target must be followed continuously for a long time. On the other hand motion detectors only output instantaneous target movement. There are two main problems in the existing design of tracking sensors. Firstly they cannot handle complex target images, therefore simple features are used as the target for some sensors, even though the target does not always have those features in the real-world. Usually those sensors only track simple features such as edges or bright points. Secondly the precision of tracking is quite poor due to their circuit techniques. So although they perform well on synthetic data, performance is poor on real-world images. This thesis investigates how to realize a single chip tracking sensor which can deal with complex real-world object. A survey of existing tracking algorithms, which can be implemented on silicon is presented. A computation directed algorithm, which is known as BMA (Block Matching Algorithm) has been adopted and modified. This algorithm can deal not only with edges but also with more ambiguous features, and a performance of the algorithm is tested with real-world images. Hybrid circuits consisting sensors, analogue and digital circuits have been developed, and high precision tracking circuits are presented. The circuits, which incorporate 64x64 Active Pixel Sensors, parallel analogue memory and a Switched Capacitor parallel processing unit, are implemented on a single chip and fabricated. The circuits have been tested electrically, and total chip performance has been examined with test bed for tracking. Finally ideas for future improvements are presented. These are actually possible with current CMOS technology.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available