Use this URL to cite or link to this record in EThOS: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.652006
Title: Pulse stream VLSI circuits and techniques for the implementation of neural networks
Author: Hamilton, Alister
Awarding Body: University of Edinburgh
Current Institution: University of Edinburgh
Date of Award: 1993
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Abstract:
The recent dramatic increase in research activity in the study of artificial neural networks has resulted in nonlinear systems that are capable of tasks such as classification, optimisation and content addressable memory. These successes, together with the desire to understand and mimic biological neural systems, have led to interest in the implementation of neural networks in both analogue and digital VLSI. This thesis describes the pulse stream methodology for signalling, arithmetic and communication in VLSI neural networks. A review of conventional VLSI implementations of neural networks by case study highlights the significant contributions to date in the areas of digital, mixed signal and analogue neural networks. A review of pulsed VLSI implementations of neural networks highlights research activity that is most closely related to that contained within this thesis. Several pulse stream neuron and synapse circuits have been developed and implemented in VLSI to test their operation. Methods for communicating neural state information between chips have been developed and implemented. The use of automatic set up procedures for analogue VLSI circuits are seen as essential to the development of large pulse stream neural networks and have been investigated. These circuits comprise The Edinburgh Pulse Stream Cell Library. The experience gained in developing this cell library has resulted in the development of a large pulse stream neural network chip, EPSILON (Edinburgh's Pulse Stream Implementation of a Learning Oriented Network), which has been demonstrated solving vowel recognition using real world data. A recommendation for the use of pulse stream circuits for various categories of neural network based on cells presented in this thesis has been made and forms the main contribution to knowledge of this work.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.652006  DOI: Not available
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