Use this URL to cite or link to this record in EThOS: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.649662
Title: A compiler cost model for speculative multithreading chip-multiprocessor architectures
Author: Dou, Jialin
Awarding Body: University of Edinburgh
Current Institution: University of Edinburgh
Date of Award: 2006
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Abstract:
This thesis proposes a novel compiler static cost model of speculative multithreaded execution that can be used to predict the resulting performance. This model attempts to predict the expected speedups, or slowdowns, of the candidate speculative sections based on the estimation of the combined run-time effects of various speculation overheads, and taking into account the scheduling restrictions of most speculative execution environments. The model is based on estimating the likely execution duration of threads and considers all the possible permutations of these threads when scheduled on a multiprocessor. The proposed cost model was implemented in a research computer development framework. The model seamlessly uses the compiler’s intermediate representation and integrates with the control and data flow analyses. The resulting framework was tested and evaluated on a collection of SPEC benchmarks, which include large real-world scientific and engineering applications. The framework was found to be very stable and efficient with moderate compilation times. Initially, the proposed framework is evaluated on a number of loops that suffer mainly from load imbalance and thread dispatch and commit overheads. Experimental results show that the framework can identify on average 68% of the loops that cause slowdowns and on average 97% of the loops that lead to speedups. In fact, the framework predicts the speedups or slowdowns with an error of less than 20% for an average of 44% of the loops across the benchmarks, and with an error of less than 50% for an average of 84% of the loops. Overall, the framework leads to a performance improvement of 5% on average, and as high as 38%, over a naïve approach that attempts to speculatively parallelize all the loops considered. The proposed framework is also evaluated on loops that may suffer from data dependence violations. Experimental results with all loops show that prediction accuracy is lower when loops with violations are included. Nevertheless, accuracy is still very high for a static model.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.649662  DOI: Not available
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