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Title: Reconfigurable microarchitectures at the programmable logic interface
Author: Donlin, Adam
Awarding Body: University of Edinburgh
Current Institution: University of Edinburgh
Date of Award: 2001
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Dynamic, runtime reconfiguration is one of the most compelling, yet elusive applications of programmable logic. The lack of an accepted design methodology and limitations of the programmable logic interface are identified as two significant factors constraining the mainstream acceptance of runtime reconfiguration and virtual circuitry(VC). This thesis presents a framework for investigating a new form of flexible programmable logic interface capable of adapting to the demands of different VC models. An abstract architecture for virtual circuitry is presented in the context of two fundamental models of VC: the sea of accelerators and the parallel harness. The abstract architecture's position within the class of Transport Triggered Architectures(TTAs) is considered and we discuss how attributes of the architecture are harnessed to facilitate a third, sequential algorithmic VC model. A novel implementation of the abstract architecture is described; the implementation of the Ultimate RISC(URISC), a minimal microarchitecture, is presented and is then evolved into the Flexible URISC(FURI), an instance of the abstract VC architecture. A design flow and associated toolset for the FURI core is presented. This includes a discussion of the merits and complications of difference strategies for circuitry loading plus the features of a multitasking runtime environment for the FURI core, the FURI executive. Starting with the description of a simple base protocol, the design space for FURI protocols is qualified. The communication characteristics of the three VC models are described and their influence on the form of FURI protocols considered. Implementations of the Data Encryption Standard(DES) are proposed, demonstrating how the FURI system supports each of the three VC models.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available