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Title: Investigation of voltage injection control for power supplies in radar applications
Author: Bunlaksananusorn, Chanin
Awarding Body: University of Edinburgh
Current Institution: University of Edinburgh
Date of Award: 1998
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In radar applications, system performance depends strongly on the dynamic performance of its power supply. The operation of the transmitter causes a step-current to be drawn from its power supply, leading to a transient voltage drop. The voltage must settle to within pre-specified limits, before the arrival of the echoed pulse signals from the target, to ensure the correct functionality of the radar receiver; otherwise, some of these pulses have to be rejected. Rejected pulses reduce the accuracy of the information of the target, causing system performance to deteriorate. It is therefore vital that radar power supplies have a very robust dynamic performance to load changes. Although the transient requirements of a radar power supply are stringently specified, the precise timing of the load application is known in advance, allowing advance compensation to be made. The anticipated effect of the connection of load can be alleviated by increasing the pulse width of the converter before the load is applied, by the injection of a small voltage into the control loop. With a suitable injected voltage, significant improvement in transient response is achieved. Based on this principle, Voltage Injection Control (VIC) is proposed and investigated in this thesis. In this thesis, the implementation and design considerations of VIC are described. Time-domain optimisation using HSPICE is proposed to select a suitable injected voltage to meet the specified transient performance. Both experimental and simulated are presented, demonstrating the robustness of the technique. Utilisation of this technique in distributed power systems for future phased-array radar systems and in other possible applications is also discussed. During the course of this research, HSPICE optimisation has been applied effectively to design the control loop error amplifier compensation circuit in the time-domain, overcoming some of the limitations of the traditional frequency-domain approach.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available