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Title: Real-time automated visual inspection of integrated circuit wire-bonds
Author: Mandava, R.
Awarding Body: University College of Swansea
Current Institution: Swansea University
Date of Award: 1995
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Among the various stages in the IC assembly process, wire-bonding is a most crucial stage, that has a major influence on the yield, because it is a mechanical process which is being performed at microscopic scale. Wire-bonding involves making a physical connection between the bond pads on an integrated circuit die and the leads of the package that carries the die. With the most sophisticated bonding machines, the current figures of yield loss in this process are in the region of 40 to 1000 parts per million (ppm). However, the present process quality requirements of this process are being targeted at 3.4 ppm yield loss (6σ process). One possible way of achieving low yield losses is by introducing on-line process feedback through visual inspection. Post-wire-bond inspection has thus far been a highly labour-intensive manual process, limited to off-line sample inspection, for which no comprehensive solution exists to date. This thesis addresses this problem: working in close collaboration with a major IC manufacturer, Intel Technology Pvt Ltd (Malaysia), and concentrating on state-of-the-art integrated circuits, the defects that need to be detected by the inspection system are identified, based on the military standards for the quality control of integrated circuits MIL STD 883C. Then, using a collection of known machine-vision techniques, together with new techniques where necessary to ensure the required accuracy, speed and cost-effectiveness, a comprehensive IC wire-bond inspection system is proposed. The defect classification capability that is crucial to on-line process feedback is built into the algorithms.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available