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Title: Investigating the potential of machine learning techniques for feedback-based coverage-directed test genreation in simulation-based digital design verification
Author: Ioannides , Charalambos
Awarding Body: University of Bristol
Current Institution: University of Bristol
Date of Award: 2013
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A consistent trend in the semiconductor industry has been the increase of embedded functionality in new designs. As a result, the verification process today requires significant resources to cope with these increasingly complex designs. In order to alleviate the problem, industrialists and academics have proposed and improved on many formal, simulation-based and hybrid verification techniques. To dale, none of the approaches proposed have been ab le to present a convincing argument warranting their unconditional adoption by the industry. In an attempt to further automate design verification (DV), especially in simulation-based and hybrid approaches, machine learning (ML) techniques have been exploited to close the loop between coverage feedback and test generation ; a process also known as coverage directed test generation (COG). Although most techniques in the literature are reported to help in constructing minimal tests that exercise most, if not the entire design under verification, a question remains on their practical usefulness when applied in real-world industry-level verification environments. The aim of this work was to answer the following questions: I. What would constitute a good ML-COG solution? What would be its characteristics? 2. 00 existing ML-CDG technique(s) scale to industrial designs and verification environments? 3. Can we develop an ML-based system that can attempt functional coverage balancing? This work answers these questions having gathered requirements and capabilities from earlier academic work and having filtered them through an industrial perspective on usefulness and practicality. The main metrics used to evaluate these were effectiveness in terms of coverage achieved and effort in terms of computation time. A coverage closure effective and easy to use genetic programming technique has been applied on an industrial level verification project and the poor results obtained show that the particular technique does not scale well. Linear regress ion has been attempted for feature extraction as part of a larger and novel stochastic ML-CDG model. The results on the capability of these techniques were again below expectations thus showing the ineffectiveness of these algorithms on larger datasets. Finally, learning classifier systems, specifically XCS, have been used to discover the cause-effect relationships between test generator biases and coverage. The results obtained pointed to a problem with the learning mechanism in XCS, and a misconception held by academics on its capabilities. Though XCS at its current state is not an immediately exploitable ML~CDG technique, it shows the necessary potential for later adoption once the problem discovered here is resolved through further research. The outcome of this research was the realisation that the contemporary ML methodologies that have been experimented with fall short of expectations when dealing with industry-level simulation-based digital design verification. In addition, it was discovered that design verification constitutes a problem area that can stress these techniques to their limits and can therefore indicate areas for further improvement and academic research.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available