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Title: Design and optimisation of the dual gate inversion layer emitter transistor for power integrated circuits
Author: Udugampola, Nishad Kalhar
Awarding Body: University of Cambridge
Current Institution: University of Cambridge
Date of Award: 2006
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No abstract available
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID:  DOI: Not available