Use this URL to cite or link to this record in EThOS: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.605599
Title: Design and analysis of high linearity circuits for wireless receivers
Author: Jiang, J.
Awarding Body: University of Cambridge
Current Institution: University of Cambridge
Date of Award: 2010
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Abstract:
This dissertation focuses on the development of improved design methods for the realisation of high performance integrated radio frequency circuits in CMOS. The techniques developed are illustrated by means of case studies in the realm of modern wireless communication systems. It presents the design and analysis of a high linearity (IIP3) integrated LNA and down-conversion mixer, and the development of a high IIP2 down-conversion mixer utilising a new calibration technique, both in a standard 0.18μm CMOS process. The design and layout work were conducted using Agilent Technologies’ Advanced Design System (ADS) and Mentor Graphics ICFlow. Simulations were conducted using BSIM3v3 SPICE models to predict circuit behaviour and performance. Post-layout simulation indicates competitive performance. The high IIP3 LNA employs a linearlisation technique which is modified from the active post-distortion (APD) method. For accurate estimation of nonlinear distortion in the LNA circuit. Taylor series and Volterra series were used as analysis techniques. The various noise contributors of the circuit were investigated. A second high IIP3 mixer was designed based on the differential derivative superposition (DDS) method. Taylor series and Volterra series were used to investigate the linearization mechanism. Furthermore, the noise characteristics of topology based on DDS were explored. Simulation suggested that a figure of 19.7dBm IIP3 can be achieved. The high IIP3 mixer was designed for use in low IF or zero IF receivers operating at 2GHz. It comprises a core mixer, a tunable common mode feedback (CMFB) amplifier and a buffer for test purposes. The down-conversion mixer adopts a novel calibration technique and provides performance optimised for modern receivers requiring a high level of second-order linearity. The core mixer is able to adjust the different device operating points thus tuning the degeneration impedance, transconductance and mismatch of the mixer switching pair.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.605599  DOI: Not available
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