Use this URL to cite or link to this record in EThOS: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.598877
Title: The design and manufacture of trench gated power MOSFETs
Author: Evans, J. L.
Awarding Body: University of Cambridge
Current Institution: University of Cambridge
Date of Award: 1997
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Abstract:
During the past five years, power MOSFET technology has enjoyed an enormous growth in popularity as device performances have increased and costs have dropped, allowing the power MOSFET to become attractive to a very wide number of applications. The DMOS transistor has been the dominant power MOSFET technology for the past twenty years. However the demands placed on power MOSFET costs and performances by such markets as the automotive and communications sectors, has meant that the trench gated power MOSFET (or UMOSFET) is seen as the technology of the future. This project was funded by the Ford Motor Company under the Teaching Company Scheme to specifically develop a low cost power device technology for the automotive market. This dissertation reports work which falls into three categories: 1. Theoretical - a new description of the operation of the power MOSFET is presented. This has proved valuable in describing and predicting the behaviour of power MOSFETs especially when operating at high current densities. 2. Conceptual - a new manufacturing technique for trench gated power MOSFETs is described which substantially improves the achievable performance of such devices through the elimination of critical alignment steps. Dramatic cost reductions are possible too with the elimination of expensive implants, sub-micron lithography steps etc. A complete one mask version of the proposed process flow is also described. 3. Practical - extensive experimental work is discussed, addressing the many manufacturing concerns relating to trench gated devices. Extensive use is made of electrical and physical modelling programs to quantify predictions, and to verify the validity of proposed processes in the absence of experimental results. A program has been written specifically to accurately model the effect of the gate arrays of such devices on the switching performance. An interesting comparison is made between the proposed novel manufacturing technique and current state of the art DMOS and UMOS devices, as well as a comparison of high voltage power MOSFETs and IGBTs manufactured using the same technique.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.598877  DOI: Not available
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