Use this URL to cite or link to this record in EThOS: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.597852
Title: Dual-gate high electron mobility transistors using a multiple-split-gate structure
Author: Collier, N. J.
Awarding Body: University of Cambridge
Current Institution: University of Cambridge
Date of Award: 1998
Availability of Full Text:
Full text unavailable from EThOS. Please contact the current institution’s library for further details.
Abstract:
This dissertation introduces the concept of a dual-gate high electron mobility transistor (HEMT) using a multiple-split-gate structure. The device is a field effect transistor in which the current is under the control of two independent gates; one of these is a multiple-split-gate, the other is a continuous gate in close proximity to the split-gate openings. The ability of a split-gate to laterally deplete a channel, and hence modulate its width, has been applied to dual-gate HEMTs to provide a device with a variable effective channel width. A second independent electrode adjacent to the split-gate gaps supplies added functionality and a gating action not observed in conventional dual-gate HEMTs. Three fundamental limitations of a split-gate structure have previously excluded it from consideration for practical applications: the small current handling ability, the small transconductance and the fixed impedance levels. These arise from the small active width the device (<1μm). To overcome these limitations, a multiple-split-gate structure has been devised and developed; this allows the simultaneous operation of many split-gate elements in parallel. These split-gates are integrated into a single compact structure placed within a single source drain gap. Furthermore, this structure has been combined with a second gate electrode in close proximity. This gate incorporates projections that approach or actually penetrate the multiple-split-gate openings. In this way a three-dimensional structure can be achieved with the multiple-split-gate electrode bridging the protrusions of the second gate. This dual-gate structure, implemented on GaAs based heterostructures, has been demonstrated and characterised at dc and at low frequencies up to 100 MHz. Dual-gate structures with up to 100 split-gate elements acting in parallel are reported. The current handling ability and the transconductance are considerably improved over that of a single-split-gate device. These measurements are complemented by extensive two-dimensional simulations. The predictions of these simulations agree well with the measured characteristics and furnish an understanding of the interaction of the two independent gates.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.597852  DOI: Not available
Share: