Use this URL to cite or link to this record in EThOS: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.490807
Title: Novel high-K dielectrics for MOS applications
Author: Taechakumput, Pouvanart
ISNI:       0000 0001 3495 5209
Awarding Body: University of Liverpool
Current Institution: University of Liverpool
Date of Award: 2008
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Abstract:
The ever increasing demand for improved performance of silicon based microelectronics, at a lower cost, has resulted in an aggressive reduction, or scaling, in the dimensions of the metal-oxide-semiconductor field effect transistors (MOSFET) in integrated circuits (IC). Silicon oxynitride-based gate dielectrics (SiON) have been u~ed in MOSFETs, due to their stable high quality interface with the silicon channel and excellent electrical isolation properties. However, the transistor feature size the gate dielectric has recently been reduced to the point where direct electron tunnelling effects and the leakage currents presented serious problems to device performance in sub-90 nm node IC technology. The same problem also occurs in dynamic random access memory (DRAM), another key device component in the silicon microelectronics industry which faces the challenge of increasing the effective capacitor area without'increasing its footprint in the cell. Alternatively, the use of materials with a higher dielectric permittivity (high-k or Ek) than that of Si02 (Ek = 3.9) allows an equivalent capacitance to be achieved in a physically thicker insulating layer which leads, in tum, to reduced leakage currents. Such materials includes: (i) the metal oxides (e.g., Hf02, Zr02 and Y203); (ii) the lanthanide oxides (e.g., Pr203, Gd20 3 and Ln203); and (iii) the pseudobinary alloys (e.g., ZrSixOyand NdAIOx). In this thesis, physical and electrical characteristics of the deposited high-k materials (Hf02 and NdAIOx) were thoroughly investigated. Both the atomic layer deposition (ALD) and metalorganic chemical vapour deposition (MOCVD) methods were applied in fabricating high-k dielectrics using novel precursors. The chemical vapour deposition (CVD) method is introduced and discussed and the applications of the high-k dielectrics in microelectronics are reviewed. The effect of heat treatment, both prior to and after gate metallization, on the film crystallinity and the associated electrical properties was examined in detail. Electrical measurements, of the materials studied, showed promising dielectric properties such as high permittivity values and low leakage current densities. Other properties, such as microstructures, interfacial layer thickness and morphology were also characterized. The origin of frequency dispersion effects, frequently observed in C-V measurements, was also systematically investigated. Finally,.a novel reconstruction model has also been implemented for C-V measurements in order to minimize the measurement errors using the adapted dual frequency technique. It is believed that these results will be of significant interest to both academic and industrial researchers in this fast moving field.
Supervisor: Not available Sponsor: Not available
Qualification Name: University of Liverpool, 2008 Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.490807  DOI: Not available
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