Use this URL to cite or link to this record in EThOS: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.488642
Title: Low-noise measurement techniques for brain function imaging by electrical impedance tomography
Author: Naeini, Mandana Rafiei
ISNI:       0000 0001 3438 9024
Awarding Body: University of Manchester
Current Institution: University of Manchester
Date of Award: 2008
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Abstract:
In neurosciences, there is a great need to improve methods for direct imaging of functional activity in the nervous system of the brain. Such activities occur on a time scale of the order of 10 milliseconds. No portable system exists to measure these activities non-invasively with sufficient temporal resolution and with sensitivity to the deepest regions of the brain. Electrical Impedance Tomography (EIT), as a non-invasive means for fast imaging of impedance changes during neural activity, has the promise to be highly portable, to give information on the deepest regions of the brain, and is already applied routinely in other medical applications such as breast imaging. For this technique to 'follow' the human brain's processing cycle for individual stimuli, a temporal resolution of much less than 1 second is required. The sensitivity and spatial resolution of EIT can be enhanced significantly by increasing the measurementSNR. It has been suggested that an EIT system with measurement s~nsitivity of 80 dB is required for the measurement of impedance changes in the brain occurring directly due to neural function. For this application, the University of Manchester is developing a 32channel EIT system, fElTER, with temporal resolution of 100 frames per second and SNR of 80 dB, operating over the current excitation frequency range from 10 kHz to 100 kHz. In this thesis, a modular single-channel EIT system is designed to investigate ways of achieving the high performance requirements of the fEITER system. It uses digital waveform synthesis, a 16-bit DAC and subsequent reconstmction filter, to drive the improved Howland current source. The voltage is measured using an instmmentation amplifier followed by an anti-aliasing filter and a 16-bit ADC, prior to digital PSD where the amplitude and phase information of the measured voltage is obtained. In this system the digital parts are implemented in an FPGA. The design considerations to achieve the required performance related to each module are discussed prior to design, implementation and testing related to each module in a separate chapter. The resulting single-channel EIT system operates in the frequency range of 10 kHz to 100 kHz in steps of 10 kHz. The SNR perfoffilance of the developed system is 77 dB and it has the potential of achieving 100 frames per second image acquisition for the 32-channel fEITER system.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.488642  DOI: Not available
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