Computer graphics hardware using ASICs, FPGAs and embedded logic.
The introduction of new technologies such as Field Programmable Gate Arrays
(FPGAs) with high gate counts and embedded memory Applications Specific Integrated Circuits
(ASICs) gives greater scope to the design of computer graphics hardware.
This thesis investigates the features of the current generation of FPGAs and complex
programmable logic devices (CPLD) and assesses their suitability as replacements for ASIC
technologies, and as prototyping tools for their verification prior to fabrication. The traditional
methodologies and techniques used for digital systems are examined for application to FPGA
devices and novel design flow and implementation techniques are proposed. The new
methodology and design flow uses a contemporary top down approach using hardware
description languages and combines the flexibility of those methods with the efficiency of
detailed low level design techniques.
As an example of this methodology, a set of floating point arithmetic units consisting of a
adder/subtraction, multiplication and division were designed using novel alternative algorithms that
significantly outperformed algorithms designed with traditional methods in terms of both size and
performance.T hese techniquesu sed were used to form a ToolKit that can accelerateth e design of
systems that use floating point units for computer graphics systems. This ToolKit, in combination
with a precision investigation methods can be used to generate floating point arithmetic units that
have the required precision with minimum required hardware resources.
Another emerging technology is that of embedded memory. Recent advancements in
semiconductor fabrication processes make it feasible to integrate large amounts of DRAM, SRAM
and logic on a single silicon die. This thesis will show the changes in the design flow that are require to
take advantage of this new technology. A new embedded logic ToolKit was created that facilitates the
exploitation of this technology.
Finally, as an example to this methodology, a novel processor oriented towards 3D graphics
was designedA. n architecturale xploration driven by novel trace-drivenp erformancea nalysism ethods
is detailed that was used to model and tune the processor for the execution of global illumination
computer graphics algorithms. The adaptation of these algorithms for execution in our processor is
demonstrateda nd the performancea dvantagesth at can be extracteda re shown