Tools for image processing and computer vision
The thesis describes progress towards the construction of a seeing machine. Currently, we do not understand enough about the task to build more than the simplest computer vision systems; what is understood, however, is that tremendous processing power will surely be involved. I explore the pipelined architecture for vision computers, and I discuss how it can offer both powerful processing and flexibility. I describe a proposed family of VLSI chips based upon such an architecture, each chip performing a specific image processing task. The specialisation of each chip allows high performance to be achieved, and a common pixel interconnect interface on each chip allows them to be connected in arbitrary configurations in order to solve different kinds of computational problems. While such a family of processing components can be assembled in many different ways, a programmable computer offers certain advantages, in that it is possible to change the operation of such a machine very quickly, simply by substituting a different program. I describe a software design tool which attempts to secure the same kind of programmability advantage for exploring applications of the pipelined processors. This design tool simulates complete systems consisting of several of the proposed processing components, in a configuration described by a graphical schematic diagram. A novel time skew simulation technique developed for this application allows coarse grain simulation for efficiency, while preserving the fine grain timing details. Finally, I describe some experiments which have been performed using the tools discussed earlier, showing how the tools can be put to use to handle real problems.