Use this URL to cite or link to this record in EThOS: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.236130
Title: Silicon on insulator layers for three dimensional circuitry
Author: Williams, David Arfon
Awarding Body: University of Cambridge
Current Institution: University of Cambridge
Date of Award: 1987
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Abstract:
This dissertation is an account of experimental work conducted at the Microelectronics Research Laboratory of the Physics Department, Cambridge University. Structures have been studied, principally by electron microscopy, to assess the viability of a dual electron beam technique in the production of multiple layer structures. Silicon on insulator structures, where devices are made in individual islands of silicon on an insulating substrate, are of great use for many applications in microelectronics. One of these will be the use of multiple layers of devices in 'three dimensional' circuits. The dual electron beam technique is one way of producing silicon on insulator layers, and the experiments described here are performed on silicon films made by this method. For device applications, the silicon must be single crystal, and the technique uses seeding from a single crystal wafer. The film is grown by rapidly melting and recrystallizing a layer of polycrystalline silicon, and qualitative models of the regrowth process are presented. The results are also compared with quantitative models. Several investigations have been carried out to assess the suitability of the technique for producing stacked layers, where the recrystallization of upper layers must not adversely affect devices already formed in lower layers. The study has found that the dual electron beam technique is well suited to the formation of multiple silicon on insulator layers. The regrowth has been found to behave as predicted on a macroscopic scale, but shows features not previously observed when studied in detail. In particular, the existence of faceting of a submicron scale in the recrystallization front has been proven.
Supervisor: Not available Sponsor: Not available
Qualification Name: Thesis (Ph.D.) Qualification Level: Doctoral
EThOS ID: uk.bl.ethos.236130  DOI: Not available
Keywords: Integrated circuits
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